1. Field of the Invention
The present invention relates to a method of fabricating a flash memory device, and more particularly to a method of fabricating a flash memory device which can minimize damage of a dielectric film in the process of forming a high voltage transistor and a low voltage transistor having gate electrode consisted of a polysilicon layer and a silicide layer.
2. Brief Description of the Prior Art
Generally, in a memory device, a gate electrode must have a two-layer structure of a polysilicon layer and a silicide layer for realizing a high programming and an erasure operations, and also a low voltage transistor having a gate oxide film with a thickness of 30 to 150 .ANG. and a high voltage transistor having a gate oxide film with a thickness of 150 to 300 .ANG. are formed in the flash EEPROM cell.
Then, a method of fabricating a conventional flash memory device comprising a high voltage and low voltage transistors which have gate electrode consisted of a polysilicon layer/a silicide layer, respectively, will be explained below in detail by reference to the accompanying drawings.
FIGS. 1A through 1L are sectional views for illustrating step by step a method of fabricating a conventional flash memory device.
An oxide film 3 is formed on a silicon substrate 1 which is divided into a memory cell region A, a high voltage transistor region B and a low voltage transistor region C by field oxide films 2 (FIG. 1A).
The oxide film 3 in a memory cell region A is removed so that the silicon substrate 1 in the memory cell region A is exposed (FIG. 1B). A tunnel oxide film 4 is formed in the memory cell region A, a first polysilicon layer 5 is then formed on the entire structure including the field oxide films 2 (FIG. 1C). Then, the first polysilicon layer 5 formed on the high voltage and the low voltage transistors regions B and C is removed, therefore, the first polysilicon layer 5 on the tunnel oxide film 4 is remained (FIG. 1D).
A dielectric film 6 having ONO structure of a lower oxide film 6A, a nitride film 6B and a upper oxide film 6C is formed on the entire structure including the field oxide layers 2 (FIG. 1E). And then, the dielectric film 6 formed in the high voltage and the low voltage transistor regions B and C is selectively removed, and the first cleaning process is performed (FIG. 1F). Then, ions are injected in the high voltage and the low voltage transistors B and C and the second cleaning process is performed. The oxide film 3 formed in the high voltage and the low voltage transistors B and C is removed by use of HF (FIG. 1G). At this time, as can be seen from FIG. 1G, the upper oxide film 6C of the dielectric layer 6 formed in the memory cell region A is also removed in the process of removing the oxide film 3 by use of HF.
An then, a middle oxide film 6D is formed on the entire structure except for the field oxide films 2 (FIG. 1H), the middle oxide film 6D formed in the memory cell region A and the ow voltage transistor region C is removed and the third cleaning process is performed (FIG. 1I). During the third cleaning process, the nitride film 6B of the dielectric film 6 formed in the memory cell region A is damaged.
Then, a gate oxide film 7 is formed in the low voltage transistor region C. At this time, an upper oxide film 6C is formed again on the nitride film 6B, therefore, the dielectric film 6 having an ONO structure is formed in the memory cell region A.
A second polysilicon layer 8 and a silicide layer 9 are sequentially formed on the entire structure including the field oxide film 2 (FIG. 1K), the second polysilicon layer 8 and the silicide layer 9 are patterned so gate electrodes 10B and 10C are formed in the high voltage and the low voltage transistors B and C (FIG. 1L). A gate electrode 10A is formed in the active region of the memory cell region A by patterning process.
As described above, in the process of forming the gate electrodes 10A, 10B and 10C in the memory cell region A, the high voltage transistor region B and the low voltage transistor region C, respectively, the dielectric film 6 formed in the memory cell region A is damaged by cleaning solutions which is used for the cleaning processes. Therefore, the characteristic of the device is degraded.